Method and structure for BiCMOS isolated NMOS transistor

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S368000, C257S273000, C257S272000

Reexamination Certificate

active

06927460

ABSTRACT:
A structure of and a method for making an isolated NMOS transistor using standard BiCMOS processing steps and techniques. No additional masks and processing steps are needed for the isolated NMOS device relative to the standard process flow. A P-type substrate with an overlaying buried N-type layer overlaid with a buried p-type layer below a P-well is shown. An N-type region surrounds and isolates the P-well from other devices on the same wafer. N+ regions are formed in the p-well for the source and drain connections and poly or other such electrical conductors are formed on the gate, drain and source structures to make the NMOS device operational. Parasitic bipolar transistors are managed by the circuit design, current paths and biasing to ensure the parasitic bipolar transistors do not turn on.

REFERENCES:
patent: 5075752 (1991-12-01), Maeda et al.
patent: 5087579 (1992-02-01), Tomassetti
patent: 5348907 (1994-09-01), Migita
patent: 5374840 (1994-12-01), Arai
patent: 5394007 (1995-02-01), Reuss et al.
patent: 5485027 (1996-01-01), Williams et al.
patent: 5648281 (1997-07-01), Williams et al.
patent: 5731619 (1998-03-01), Subbanna
patent: 5789286 (1998-08-01), Subbanna
patent: 5859457 (1999-01-01), Thiel et al.
patent: 5945726 (1999-08-01), Prall et al.
patent: 6033946 (2000-03-01), Hutter et al.
patent: 6261932 (2001-07-01), Hulfachor
patent: 6441446 (2002-08-01), Patti
patent: 6551869 (2003-04-01), Chai et al.

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