Hybrid integrated circuit package substrate

Details Hybrid integrated circuit package substrate Hybrid integrated circuit package substrate

2005-11-15

2005-11-15

Nelms, David (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Flip chip

C428S209000, C257S704000, C257S737000, C257S738000, C257S428000, C257S209000, C257S620000

Reexamination Certificate

active

06965169

ABSTRACT:
A hybrid integrated circuit (IC) package substrate at least comprising a plurality of patterned conductive layers stacked over each other. The outermost patterned conductive layer has a plurality of bonding pads thereon. The hybrid IC package substrate also has a plurality of dielectric layers respectively sandwiched between two neighboring patterned conductive layers. At least one of the dielectric layers is a ceramic dielectric layer and at least one of the remaining dielectric layers is an organic dielectric layer. There is also a plurality of vias passing through at least one of the dielectric layers for connecting at least two patterned conductive layers electrically.

REFERENCES:
patent: 5080958 (1992-01-01), Patterson et al.
patent: 5976710 (1999-11-01), Sachdev et al.
patent: 6538213 (2003-03-01), Carden et al.

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