Redundant memory sequence and fault isolation

Details Redundant memory sequence and fault isolation Redundant memory sequence and fault isolation

2005-12-27

2005-12-27

Beausoliel, Robert (Department: 2113)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C710S302000

Reexamination Certificate

active

06981173

ABSTRACT:
A computer system includes a plurality of memory modules that contain semiconductor memory, such as DIMMs. The system includes a host/data controller that utilizes an XOR engine to store data and parity information in a striped fashion across on a plurality of memory cartridges each containing a plurality of memory modules to create a redundant array of industry standard DIMMs (RAID). Each memory cartridge includes an independent memory controller and a corresponding control mechanism in the host/data controller to interpret the independent transitioning of each memory cartridge between various states, including a redundant-ready and a powerdown state to facilitate “hot-plug” capabilities utilizing the removable memory cartridges. Fault information may be passed between the individual memory controllers and the host/data controller to facilitate expedient fault isolation.

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