Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Reexamination Certificate
2005-12-06
2005-12-06
Myers, Paul R. (Department: 2112)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
C710S105000, C710S107000, C710S108000
Reexamination Certificate
active
06973520
ABSTRACT:
An electronic system is disclosed, including multiple initiators and one or more targets coupled to a bus, and a request mask control unit (RMCU). The initiators are configured to initiate requests (e.g., read requests and write requests) via the bus, and the targets are configured to receive requests from the initiators via the bus. The targets are also configured to produce multiple MaskEnable signals, wherein each of the MaskEnable signals is generated following an initial request received via the bus, and dependent on a corresponding “masking situation” within the target. The RMCU receives the MaskEnable signals and produces multiple RequestMask signals dependent upon the MaskEnable signals. One or more of the initiators are permitted to repeat requests via the bus dependent upon one or more of the RequestMask signals. This mechanism provides additional bus bandwidth for carrying out successful data transfers.
REFERENCES:
patent: 5392404 (1995-02-01), Thompson
patent: 5613076 (1997-03-01), Latif et al.
patent: 5764929 (1998-06-01), Kelley et al.
patent: 5765022 (1998-06-01), Kaiser et al.
patent: 5850530 (1998-12-01), Chen et al.
patent: 5881255 (1999-03-01), Kondo et al.
patent: 5941967 (1999-08-01), Zulian
patent: 5996036 (1999-11-01), Kelly
patent: 6061753 (2000-05-01), Ericson
patent: 6185651 (2001-02-01), Monia et al.
patent: 6275887 (2001-08-01), Derr et al.
patent: 6282598 (2001-08-01), Manabe
patent: 6324617 (2001-11-01), Arimilli et al.
patent: 6343344 (2002-01-01), Arimilli et al.
patent: 6397279 (2002-05-01), Jaramillo et al.
patent: 6598104 (2003-07-01), Jaramillo et al.
patent: 2002/0184421 (2002-12-01), Weber et al.
patent: 2000207354 (2000-07-01), None
Kaufman,J. S.;“Blocking in a Completely Shared Resource Environment with State Dependent Resource and Residency Requirements”; INFOCOM '92. Eleventh Annual Joint Conference of the IEEE Computer and Communications Societies;IEEE; May 8, 1992;pp. 2224-2232.
“Structure for Controlling Small Computer System Interface Logical Devices in an Independent and Overlapped Manner”;IBM Technical Disclosure Bulletin; Jun. 1990; vol. 33, No. 1A; pp. 330-332.
“Automatic Target Mode for the Small Computer System Interface”;IBM Technical Disclosure Bulletin; Oct. 1990; vol. 33, No. 5; pp. 130-133.
Khalil, A.H., et al.; “FPGA Implemented Fast Two's Complement Serial-parallel Multiplier With PCI Interface”;IEEE, Dec. 14-16, 1998; pp. 21-24.
Hayashi, Y. et al.; “Implementation and Evaluation for Dependable Bus Control Using CPLD”;IEEE; Apr. 2000; pp. 11-18.
U.S. Appl. No. 09/740,178.
Drerup Bernard Charles
Ganasan Jaya Prakash Subramaniam
Hofmann Richard Gerard
Iachetta, Jr. Richard Nicholas
Wolford Barry Joe
Carr LLP
Gerhardt Diana R.
International Business Machines - Corporation
Myers Paul R.
Stiglic Ryan
LandOfFree
System and method for providing improved bus utilization via... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with System and method for providing improved bus utilization via..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method for providing improved bus utilization via... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3482557