Stack arrangement of a memory module

Details Stack arrangement of a memory module Stack arrangement of a memory module

2005-08-09

2005-08-09

Clark, Jasmine (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

C257S686000, C257SE25013, C257SE25018

Reexamination Certificate

active

06927484

ABSTRACT:
A stack arrangement of discrete components includes a carrier substrate and at least two discrete components, e.g., memory chips. The carrier substrate has line conductor structures and contact pads. Each of the discrete components includes centrally disposed bond pads and a metallic coating, which is electrically connected to the centrally disposed bond pads. The metallic coating is disposed on an active surface area of each discrete component. A protective structure overlies a central region of the discrete component. In the preferred embodiment, the metallic coatings of each discrete component are identical. Preferably, the discrete components are stacked on the carrier substrate so as to have the same orientation, so that the protective structure serves as a spacer between the discrete components. Further, the metallic coating is electrically coupled to the carrier substrate.

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