Chip scale pin array

Details Chip scale pin array Chip scale pin array

2005-12-13

2005-12-13

Trinh, Michael (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Ball or nail head type contact, lead, or bond

C257S737000, C257S734000

Reexamination Certificate

active

06975038

ABSTRACT:
An integrated circuit package with lead fingers with a footprint on the order of the integrated circuit footprint is provided. A lead frame may be made from a metal sheet, which may be stamped or etched. The lead frame provides a plurality of posts and a connecting sheet connecting the plurality of posts. Dice are adhesively mounted to the plurality of posts. The dice have a conductive side with a plurality of conducting pads where each conducting pad is electrically and mechanically connected to a post. An encapsulating material is placed over the dice and lead frame, with the connecting sheet keeping the encapsulating material on one side of the lead frame. Parts of the connecting sheet are then removed, electrically isolating the posts. The integrated circuit packages formed by the encapsulated dice and leads may be tested as a panel, before the integrated circuit packages are singulated.

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U.S. Appl. No. 09/698,736, entitled “Chip Scale Pin Array”, filed Oct. 26, 2000, inventor(s): Shahram Mostafazadeh.

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