Method for operating a NAND-array memory module composed of...

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185030, C365S185290

Reexamination Certificate

active

06952369

ABSTRACT:
A method for writing a memory module includes providing a plurality of memory cells, applying a first transmission line voltage to the first transmission line of the column of a memory cell, turning on a P-type channel of a memory cell between the memory cell to be written and the first transmission line of the column of the memory cell, turning off the P-type channel of at least one memory cell between the memory cell and the second transmission line of the column of the memory cell, applying a word line voltage to a word line connected to the memory cell, in order to inject hot electrons on a junction between the substrate and the first P-type doped region of the memory cell into a silicon nitride layer of the memory cell using band-to-band tunneling injection, and applying a substrate voltage to the substrates of the plurality of memory cells.

REFERENCES:
patent: 6735125 (2004-05-01), Hirano

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