Semiconductor device and manufacturing method thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S204000, C257S069000, C257S377000, C257S368000

Reexamination Certificate

active

06979846

ABSTRACT:
A semiconductor device comprises a support layer made of semiconductor, a diffusion layer formed by implanting impurities in a surface layer of the support layer, a buried insulating layer provided on the diffusion layer, an island-like active layer provided on the buried insulating layer, a channel region formed in the active layer, source and drain regions formed in the active layer, sandwiching the channel region, a gate insulating film formed on the channel region, a gate electrode formed on the gate insulating film and on side surfaces of the island-like active layer, and insulated and isolated from the channel, source, and drain regions, and an electrode connected to the active layer.

REFERENCES:
patent: 6072217 (2000-06-01), Burr
patent: 6420767 (2002-07-01), Krishnan et al.
patent: 6433609 (2002-08-01), Voldman
patent: 6465823 (2002-10-01), Yagishita et al.
patent: 6521957 (2003-02-01), Patelmo et al.
patent: 6682966 (2004-01-01), Iwata et al.
patent: 07-131025 (1995-05-01), None
patent: 2000-12858 (2000-01-01), None
patent: 2000-260991 (2000-09-01), None
patent: 2001-077364 (2001-03-01), None
patent: 2001-144276 (2001-05-01), None
patent: 2002-110994 (2002-04-01), None
patent: 365017 (1999-07-01), None
T. Tanaka, K. Suzuki, H. Horie, and T. Sugii, “Ultrafast Low Power Operation of p+- n+Double-Gate SOI MOSFETs, ” Didest of Technical Papers-Symposium on VLSI Technology (1994), pp. 11-12.
K. Suzuki, T. Tanaka, H. Horie, Y. Arimoto, and T. Itoh, “Analytical Surface Potential Expression for Double-Gate SOI MOSFETs,” Proc. Int'l Workshop on VLSI Process and Development Modeling (1993), pp. 150-151.
Cork Institute of Technology, “Solid State Deevices,” (Nov. 1999) pp. 1-3.
Purdue University, “MOS Electrostatics,”EE-595N (2000) pp. 1-4.
Assaderaghi, F. et al., “Dynamic Threshold-Voltage MOSFET (DTMOS) for Ultra-Low Voltage VLSI”, IEEE Transactions on Electron Devices, vol. 44, No. 3, pp. 414-422, (Mar. 1997).
Tang, Stephen Hsien Shun, “Dynamic Threshold MOSFETs for Future Integrated Circuits”, A Dissertation Submitted in Partial Satisfaction of the Requirements for the Degree of Doctor of Philosophy in Engineering—Elctrical Engineering and Computer Sciences in the Graduate Division of the University of California at Berkeley, pp. 1-129, (Spring 2001).
A. Yagishita, et al., Dynamic Threshold Voltage Damascene Metal Gate MOSFET (DT-DMG-MOS) with Low Threshold Voltage, High Drive Current, and Uniform Electrical Characteristics, IEDM Tech. Dig., pp. 663-666, 2000.
M. Takamiya, et al., “High Performance Electrically Induced Body Dynamic Threshold SOI MOSFET (EIB-DTMOS) With Large Body Effect and Low Threshold Voltage,” IEDM Tech. Dig., pp. 423-426, 1998.
T. Sato, et al., “A New Substrate Engineering for the Formation of Empty Space in Silicon (ESS) Induced by Silicon Surface Migration,” IEDM Tech. Dig., pp. 517-520, 1999.
Copy of Office Action from the State Intellectual Property Office of the People's Republic of China.

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