Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2005-05-24
2005-05-24
Hu, Shouxiang (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S339000, C257S394000, C257S408000
Reexamination Certificate
active
06897526
ABSTRACT:
To provide a semiconductor device that can effectively suppress the short channel effect without deterioration of carrier migration, an impurity ion is added from a direction of the <110> axis with respect to a silicon substrate on forming a punch through stopper under the gate electrode. In this invention, because the addition of the impurity is conducted by utilizing the principal of channeling, the impurity can be added a small amount of scattering suppressing damages on the surface of the silicon substrate. A channel forming region having an extremely small impurity concentration and substantially no crystallinity disorder is formed.
REFERENCES:
patent: 4768076 (1988-08-01), Aoki et al.
patent: 4857986 (1989-08-01), Kinugawa
patent: 4933298 (1990-06-01), Hasegawa
patent: 4993298 (1991-02-01), Chamulak et al.
patent: 5146291 (1992-09-01), Watabe et al.
patent: 5217913 (1993-06-01), Watabe et al.
patent: 5563928 (1996-10-01), Rostoker et al.
patent: 5643826 (1997-07-01), Ohtani et al.
patent: 5650340 (1997-07-01), Burr et al.
patent: 5686321 (1997-11-01), Ko et al.
patent: 5793073 (1998-08-01), Kaminishi et al.
patent: 5818076 (1998-10-01), Zhang et al.
patent: 5854123 (1998-12-01), Sato et al.
patent: 5854509 (1998-12-01), Kunikiyo
patent: 5877070 (1999-03-01), Goesele et al.
patent: 5882987 (1999-03-01), Srikrishnan
patent: 5893740 (1999-04-01), Chang et al.
patent: 5899711 (1999-05-01), Smith
patent: 5923962 (1999-07-01), Ohtani et al.
patent: 5926712 (1999-07-01), Chen et al.
patent: 5945972 (1999-08-01), Okumura et al.
patent: 5949107 (1999-09-01), Zhang
patent: 6031268 (2000-02-01), Hiroki et al.
patent: 6083794 (2000-07-01), Hook et al.
patent: 6093951 (2000-07-01), Burr
patent: 56060061 (1981-05-01), None
patent: 2-153538 (1990-06-01), None
patent: 5-102180 (1993-04-01), None
Son et al., “Comparative Study of Several Anti-Punchthrough Designs for Buried Channel PMOSFET,” Device Research Conference Digest, Jun. 1997.*
Full English translation re Japanese Patent Application No. JP 5-102180, published Apr. 23, 1993.
Auberton-Herve, A.J., “Industrial Research Society (Kogyo Chosa Kai) ,”Electronic Material, pp. 83-87, Aug., 1997.
Izumi, K. et al, “C.M.O.S. Devices Fabricated on Buried SiO2Layer Formed by Oxygen Implantation into Silicon,”Electronics Letters, vol. 14, No. 18, pp. 593-597, Aug. 31, 1978.
Sakaguchi, K. et al, “Current Progress in Expitaxial Transfer (ELTRAN) ,”IEICE Trans. Electron, vol. E80 C, No. 3, pp. 378-387, Mar., 1997.
English Abstract re Japanese Patent Application No. JP 2-153538, published Jun. 13, 1990.
English Abstract re Japanese Patent Application No. JP 5-102180, published Apr. 23, 1993.
Kubo Nobuo
Miyanaga Akiharu
Cook Alex McFarron Manzo Cummings & Mehler, Ltd.
Hu Shouxiang
Semiconductor Energy Laboratory Co,. Ltd.
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