Semiconductor device having a doped lattice matching layer...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S385000, C257S492000, C257S493000, C438S491000, C438S495000, C438S499000

Reexamination Certificate

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06855991

ABSTRACT:
The present invention provides a semiconductor device, a method of manufacture therefor, and an integrated circuit including the same. The semiconductor device may include a doped buried layer located over a doped substrate and a doped epitaxial layer located over the doped buried layer. The semiconductor device may further include a first doped lattice matching layer located between the substrate and the buried layer and a second doped lattice matching layer located between the doped buried layer and the doped epitaxial layer.

REFERENCES:
patent: 4378259 (1983-03-01), Hasegawa et al.
patent: 6753234 (2004-06-01), Naem
U.S. Appl. No. 10/003,873, filed Oct. 24, 2001; entitled “Semiconductor Device Having a Doped Lattice Matching Layer and Method of Manufacture Therefor” to Wen Lin, et al.; Allowed Jan. 13, 2004.

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