Electronic digital logic circuitry – Interface – Logic level shifting
Patent
1996-05-23
1997-02-11
Westin, Edward P.
Electronic digital logic circuitry
Interface
Logic level shifting
326 24, 326 68, 326 83, 327206, H03K 190185, H03K 3295, H03K 190948
Patent
active
056024967
ABSTRACT:
An input buffer circuit is disclosed which provides better noise margin and sharper switching edges than previously known systems. This circuit includes an input level translator, a Schmitt trigger circuit coupled to the input level translator circuit, a buffer, and sleep function circuit. The sleep function circuit reduces power when the input buffer circuit is powered down. The Schmitt trigger circuit comprises the hysteresis transfer characteristic providing means of the present invention. The Schmitt trigger circuit and buffer circuit, both with properly matched beta values for the participating transistors, allows for improved noise immunity of and sharper switching edges for the input buffer of the present invention.
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Advanced Micro Devices , Inc.
Santamauro Jon
Westin Edward P.
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