Method of cleaning an inter-level dielectric interconnect

Details Method of cleaning an inter-level dielectric interconnect Method of cleaning an inter-level dielectric interconnect

Filed on

2005-03-29

Date issued

2005-03-29

Examiner

Lee, Hsien-Ming (Department: 2823)

Patent Class

Semiconductor device manufacturing: process

SubClass

Coating with electrically or thermally conductive material

SubSubClass

To form ohmic contact to semiconductive material

Other Related Categories

C438S637000, C438S700000, C438S725000, C438S780000

Type

Reexamination Certificate

Status

active

Patent number

06872652

Description

ABSTRACT:
A method for cleaning a semiconductor interconnect structure formed in an organic ILD using an anisotropic organic dielectric etch in combination with a sputter clean process. Organic material displaced from the sidewalls to the bottom of the structure by the sputter clean is removed by the ion enhanced organic etch. Interconnect resistance shift is reduced and reliability of the interconnect structure is improved by removing contaminates at the interface of the via/contact, and by increasing adhesion of the liner or plug to the underlying conductive layer.

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Zhao, B., et al., “Integration of Low Dielectric Constant Materials in Advanced Aluminum and Copper Interconnects,” Mat. Res. Soc. Symp. Proc., vol. 564, 1999 Materials Research Society, pp. 485-497.

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