Memory interface circuit

Details Memory interface circuit Memory interface circuit

2005-02-22

2005-02-22

Tran, Denise (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C711S158000, C365S222000

Reexamination Certificate

active

06859857

ABSTRACT:
A memory bus arbitrating circuit selects the request signal with the highest priority when a plurality of types of request signals are inputted simultaneously. A memory controlling circuit executes memory control responsive to selection by the memory bus arbitrating circuit. A monitoring circuit outputs a refresh request signal when the count value of a refresh counter reaches a comparison value stored in an overwrite-capable memory. The count value is selectable so that refresh can be executed at a timing when other high priority processing based on the request signals is not executed. After refresh, the count value of the refresh counter is reset.

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