Semiconductor memory device having a capacitive plate to...

Static information storage and retrieval – Systems using particular element – Capacitors

Reexamination Certificate

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C365S188000, C365S200000

Reexamination Certificate

active

06891743

ABSTRACT:
A CMOS-SRAM has a plurality of full CMOS type memory cells (1) and a capacity plate (2). The memory cells (1) are two-dimensionally arranged in the row direction and in the column direction. The capacity plate2adds an additional capacity to nodes ND1and ND2for storing data in order to reduce soft errors. The capacity plate (2) is common with the plurality of memory cells (1). The capacity plates (2) are separated by every column, that is in the row direction. The capacity plate (2) is connected to a power voltage line VDD so as to simplify the voltage supplying system. When a stand-by failure occurs in the memory cell (1) of a certain column, the memory cell (1) is replaced with a redundant memory cell.

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