Multiple cell with common bit line contact and method of manufac

Details Multiple cell with common bit line contact and method of manufac Multiple cell with common bit line contact and method of manufac

1996-02-26

1998-01-27

Meier, Stephen

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

H01L 29788

Patent

active

057125007

ABSTRACT:
In accordance with this invention, a method of manufacture of a semiconductor memory device comprises the following steps: forming field oxide structures on a semiconductor substrate, forming a gate oxide layer on exposed surfaces of the substrate, forming a first word line layer on the device, patterning the first word line layer by forming a first patterned mask mask with a first set of openings therein and etching the first word line layer through the openings in the first mask to form conductor lines, forming a first dielectric layer on the surface of the first word line layer on the device, forming a second word line layer on the first dielectric layer, patterning the second word line layer by forming a second patterned mask with a second set of openings therein and etching portions of the second word line layer therethrough, h) forming a second dielectric layer on the surface of the second word line layer on the device, and implanting ions of dopant into predetermined locations into the semiconductor substrate of the device, the dopant being of sufficient concentration to form a doped region therein.

REFERENCES:
patent: 5204542 (1993-04-01), Namaki et al.
patent: 5409854 (1995-04-01), Bergemont
patent: 5414277 (1995-05-01), Anzai

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