Lead frame chip scale package

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S676000, C438S123000

Reexamination Certificate

active

06888228

ABSTRACT:
In one aspect of the invention, a lead frame panel suitable for use in packaging an array of integrated circuits is described. The lead frame panel includes a matrix of tie bars that extend in substantially perpendicular rows and columns to define a two dimensional array of immediately adjacent device areas separated only by the tie bars. Each device area is suitable for use in an independent integrated circuit package and includes a die attach pad and a plurality of conductive contacts. In another aspect of the invention, a panel assembly suitable for use in simultaneously packaging a multiplicity of integrated circuits is described. The panel assembly includes a lead frame panel formed from a conductive sheet. The lead frame panel is patterned to define at least one two dimensional array of adjacent device areas. Each device area is suitable for use as part of an independent integrated circuit package and including a die and a plurality of contacts positioned around and electrically connected to the die. A molded cap is also provided that substantially uniformly covers a two dimensional array of adjacent device areas while leaving bottom surfaces of the conductive contacts exposed to facilitate electrical connection to external components. The encapsulation material that forms the molded cap is exposed at a bottom surface of the panel of integrated circuits to physically isolate the contacts.

REFERENCES:
patent: 3657805 (1972-04-01), Johnson
patent: 4504435 (1985-03-01), Orcutt
patent: 4672418 (1987-06-01), Moran et al.
patent: 4896418 (1990-01-01), Yearsley
patent: 4899207 (1990-02-01), Hallowell et al.
patent: 5122860 (1992-06-01), Kikuchi et al.
patent: 5157475 (1992-10-01), Yamaguchi
patent: 5157480 (1992-10-01), McShane et al.
patent: 5177591 (1993-01-01), Emanuel
patent: 5200362 (1993-04-01), Lin et al.
patent: 5273938 (1993-12-01), Lin et al.
patent: 5294827 (1994-03-01), McShane
patent: 5521429 (1996-05-01), Aono et al.
patent: 5559364 (1996-09-01), Hojyo
patent: 5640746 (1997-06-01), Knecht et al.
patent: 5656550 (1997-08-01), Tsuji et al.
patent: 5663593 (1997-09-01), Mostafazadeh et al.
patent: 5696033 (1997-12-01), Kinsman
patent: 5844315 (1998-12-01), Melton et al.
patent: 5973388 (1999-10-01), Chew et al.
patent: 5977613 (1999-11-01), Takata et al.
patent: 6033933 (2000-03-01), Hur
patent: 6117710 (2000-09-01), Mostafazadeh et al.
patent: 6130473 (2000-10-01), Moistafazadeh et al.
patent: 6143981 (2000-11-01), Glenn
patent: 6190938 (2001-02-01), Liu
patent: 6201292 (2001-03-01), Yagi et al.
patent: 6215179 (2001-04-01), Ohgiyama
patent: 6400004 (2002-06-01), Fan et al.
patent: 6424024 (2002-07-01), Shih et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Lead frame chip scale package does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Lead frame chip scale package, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Lead frame chip scale package will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3441918

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.