Semiconductor device having polycrystalline silicon layer with u

Details Semiconductor device having polycrystalline silicon layer with u Semiconductor device having polycrystalline silicon layer with u

1995-05-23

1997-04-22

Limanek, Robert P.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257534, H01L 2968, H01L 27108, H01L 2404

Patent

active

056232438

ABSTRACT:
A semiconductor device having a roughed surface, which is useful for a capacitor electrode is disclosed. The device is featured by depositing a polycrystalline silicon layer in such a manner that polycrystalline grains having a hemispherical like shape or a mushroom like shape are caused at the surface of the polycrystalline silicon layer. A dielectric is formed on the polycrystalline layer having an uneven surface. A conductive layer is formed on the dielectric layer. The semiconductor device thus obtained has a large effective surface area and is suitable for a capacitor electrode because of its increased effective surface area from the hemispherical like shaped or mushroom like shaped polycrystalline grains.

REFERENCES:
patent: 4301588 (1981-11-01), Horng et al.
patent: 4441249 (1984-04-01), Alspector et al.
patent: 4757360 (1988-07-01), Faraone
patent: 4774202 (1988-09-01), Pan et al.
patent: 4874716 (1989-10-01), Rao
patent: 4905072 (1990-02-01), Komatsu et al.
patent: 4951175 (1990-08-01), Kurosawa et al.
patent: 5017505 (1991-05-01), Fujii et al.
patent: 5025741 (1991-06-01), Suwani et al.
patent: 5037773 (1991-08-01), Lee et al.
patent: 5061650 (1991-10-01), Dennison et al.
patent: 5064779 (1991-11-01), Hasegawa
patent: 5070032 (1991-12-01), Yuan et al.
patent: 5102813 (1992-04-01), Kobayashi et al.
patent: 5110752 (1992-05-01), Lu
patent: 5114873 (1992-05-01), Kim et al.
patent: 5124767 (1992-06-01), Koyama
patent: 5183772 (1993-02-01), Jin et al.
patent: 5227651 (1993-07-01), Kim et al.
patent: 5245206 (1993-09-01), Chu et al.
patent: 5270224 (1993-12-01), Furumura et al.
patent: 5290729 (1994-03-01), Hayashide et al.
patent: 5302844 (1994-04-01), Mizuno et al.
patent: 5385863 (1995-01-01), Tatsumi et al.
T. Mine et al., "Capacitance-Enhanced Stacked-Capacitor with Engraved Storage Electrode for Deep Submicron DRAM's," Solid State Devices and Materials, Aug. 28-30, 1989, pp. 137-140.
Patent Abstracts of Japan, Unexamined Applications, E Field, vol. 13, No. 344, Aug. 3, 1989, The Patent Office Japanese Government, p. 36 E 797 Kokai-No. 1-102 918 (NEC).
H. Cerva et al., "Microstructure and Interfaces of Polysilicon in Integrated Circuits," Polycrystalline Semiconductors, Grain Boundaries and Interfaces, Proceedings of the International Symposium, Malente, West Germany, 29 Aug.-2 Sep. 1988, Springer Proceedings in Physics, vol. 35, pp. 354-365.
Hyung Sup Yoon et al., "Structure and Electrical Resistivity of Low Pressure Chemical Vapor Deposited Silicon," J. Vac. Sci. Technol. A, vol. 4, No. 6, Dec. 1986, pp. 3095-3100.
H. Watanabe et al., "A New Stacked Capacitor Structure Using Hemispherical-Grain (HSG) Poly-Silicon Electrodes," Extended Abstracts of the 22nd 11990 International Conference on Solid State Devices and Materials, Sendai, 1990, pp. 873-876.

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