Providing fault-tolerance by comparing addresses and data...

Details Providing fault-tolerance by comparing addresses and data... Providing fault-tolerance by comparing addresses and data...

2005-03-01

2005-03-01

Beausoliel, Robert (Department: 2114)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S012000, C711S120000, C711S122000, C711S141000

Reexamination Certificate

active

06862693

ABSTRACT:
One embodiment of the present invention provides a system that facilitates fault-tolerance by using redundant processors. This system operates by receiving store operations from a plurality of redundant processors running the same code in lockstep. The system compares the store operations to determine if the store operations are identical, thereby indicating that the redundant processors are operating correctly. If the store operations are identical, the system combines the store operations into a combined store operation, and forwards the combined store operation to a system memory that is shared between the redundant processors. If the store operations are not identical, the system indicates an error condition. In a variation on this embodiment, the system similarly combines store operations.

REFERENCES:
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patent: 5901281 (1999-05-01), Miyao et al.
patent: 5903717 (1999-05-01), Wardrop
patent: 20010034824 (2001-10-01), Mukherjee et al.

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