Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2005-07-19
2005-07-19
Tran, Michael (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
Reexamination Certificate
active
06919239
ABSTRACT:
A method for forming a semiconductor device is disclosed. The method comprises the step of irradiating a laser light to a surface of a semiconductor through a mask provided on said surface in an atmosphere comprising an impurity of one conductivity type to diffuse said impurity into a region of said semiconductor.
REFERENCES:
patent: 3771026 (1973-11-01), Asai et al.
patent: 4266986 (1981-05-01), Benton et al.
patent: 4552595 (1985-11-01), Hoga
patent: 4555301 (1985-11-01), Gibson et al.
patent: 4569697 (1986-02-01), Tsu et al.
patent: 4638110 (1987-01-01), Erbert
patent: 4758533 (1988-07-01), Magee et al.
patent: 4885260 (1989-12-01), Ban et al.
patent: 4933298 (1990-06-01), Hasegawa
patent: 5104455 (1992-04-01), Yokota et al.
patent: 5114876 (1992-05-01), Weiner
patent: 5151383 (1992-09-01), Meyerson et al.
patent: 5200630 (1993-04-01), Nakamura et al.
patent: 5306651 (1994-04-01), Masumo et al.
patent: 5352291 (1994-10-01), Zhang et al.
patent: 5372836 (1994-12-01), Imahashi et al.
patent: 5424244 (1995-06-01), Zhang et al.
patent: 5766344 (1998-06-01), Zhang et al.
patent: 5849043 (1998-12-01), Zhang et al.
patent: 5861337 (1999-01-01), Zhang et al.
patent: 6660575 (2003-12-01), Zhang
patent: 56-142651 (1981-11-01), None
patent: 57-202729 (1982-12-01), None
patent: 58-092216 (1983-06-01), None
patent: 60-216538 (1985-10-01), None
patent: 60-245174 (1985-12-01), None
patent: 61-199640 (1986-09-01), None
patent: 61-255014 (1986-11-01), None
patent: 61-255016 (1986-11-01), None
patent: 62-264619 (1987-11-01), None
patent: 01-259530 (1989-10-01), None
patent: 86115 (1990-03-01), None
patent: 02-114521 (1990-04-01), None
patent: 02-224339 (1990-09-01), None
patent: 03-148836 (1991-06-01), None
patent: 03-178125 (1991-08-01), None
S.Wolf and R.N Tauber, Silicon Processing for the VLSI Era, Lattice Press, vol. 1:Process Technology, pp. 177-178.
Kawachi et al., “Large-Area Doping Process for Fabrication of poly-Si Thin Film Transistors Using Bucket Ion Source and XeCl Excimer Laser Annealing,” Japanese Journal of Applied Physics, vol. 29, No. 12, Dec. 1990, pp. L2370-2372.
Inoue et al., “Low Temperature CMOS Self-Aligned Poly-Si TFTs and Circuit Scheme Utilizing New Ion Doping and Masking Technique”, 1991 IEEE 20.1.1-20.1.4 IEDM, Aug. 12, 1991, pp. 555-558.
Stringfellow, “Vapor Phase Growth”, Crystal Growth, vol. 16, 2ndEdition, Pampline, Chapter 5, pp. 181-202.
Takenaka et al., “High Mobility Poly-Si Thin Film Transistors Using Solid Phase Crystallized A-Si Films Deposited by Plasma-Enhanced Chemical Vapor Deposition”, Japanese Journal of Applied Physics, vol. 29, No. 12, Dec. 1990.
Boyd, “Laser-Enhanced Oxidation of Si”, Applied Physics Letters, vol. 42, No. 8, pp. 728-730.
Craciun et al., “Direct Laser Synthesis of Thin Silicon and Germanium Nitride/Oxynitride Layers”, Nucl. Instrum. Methods Phys. Res. B, Beam Interact. Mater At., vol. B65, No. 1-4, pp. 115-118 (Mar. 1992).
Craciun et al., “Direct Oxynitride Synthesis by Multipulse Excimer Laser Irradiation of Silicon Wafers in a Nitrogen-Containing Ambient Environment”, J. Appl. Phys, vol. 68, No. 5, Sep. 1, 1990, pp. 2509-2511.
Russell et al., “Bipolar Transistors in Silicon-on-Sapphire (SOS) Effects of Nanosecond Thermal Processing”, IEEE SOS/SOI Tech. Conf. Proceedings Oct. 24, 1990.
Wolf et al., Silicon Processing for the VLSI Era vol. 1: Process Technology, Lattice Press, Sunset Beach, CA, (1989), pp. 471, 476-479.
Carey et al., “Submicrometer CMOS Device Fabrication Using Gas Immersion Laser Doping (GILD)”, IEEE Transactions on Eletcron Devices, vol. 35, No. 12, Dec. 1988, p. 2429.
Weiner et al., “Thin-Base Bipolar Transistor Fabrication Using Gas Immersion Laser Doping”, IEEE Electron Dev. Lett., vol. 10, No. 6, (1989), pp. 260-263.
Turner et al., “Gas Immersion Laser Diffusion for Efficient Cell Fabrication and Grain Boundary Research”, 16thIEEE Photovoltaic Specialist Conference, San Diego, CA, Sep. 27-30, 1982, pp. 775-780.
Carey et al., “Ultra-Shallow High Concentration Boron Profiles for CMOS Processing”, IEEE Electron Dev. Lett., vol. EDL-6, No. 6, (1985), pp. 291-293.
Carey et al., “Fabrication of Submicrometer MOSFETS Using Gas Immersion Laser Doping (GILD),” IEEE Electron Dev. Lett., vol. EDL-7, No. 7, (1986), pp. 440-442.
Weiner et al., “Measurement of Melt Depth Limited Diffusion in Gas Immersion Laser Doped Silicon Using an Improved Laser System,” (In Proceedings of the Symposium on Laser Processing for Microelectronic Applications) (1988), pp. 53-61.
Matsuo et al., “Low-Temperature Activation of Impurities Implanted by Ion Doping Technique for Poly-Si Thin-Film Transistors”, Jpn. J. Appl. Phys., vol. 31, Part I, No. 12B, Dec. 1992, pp. 4567-4569.
Mishima et al., “Implantation Temperature Effect on Polycrystalline Silicon by Ion Shower Doping”, J. Appl. Phys., vol. 74, No. 12, Dec. 15, 1993, pp. 7114-7117.
Bruno et al., RF Plasma deposition of a-silicon-germanium alloys: evidence for chemisorption-based growth process, pp. 934-939, (IEEE), Dec., 1990.
Costellia Jeffrey L.
Hoang Quoc
Nixon & Peabody LLP
Semiconductor Energy Laboratory Co,. Ltd.
Tran Michael
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