Static information storage and retrieval – Read/write circuit – Bad bit
Reexamination Certificate
2005-05-31
2005-05-31
Nguyen, Van Thu (Department: 2824)
Static information storage and retrieval
Read/write circuit
Bad bit
C365S230030
Reexamination Certificate
active
06901015
ABSTRACT:
A semiconductor memory device (1) comprises a normal RAM (2) and a redundancy RAM (3) provided independently from the normal RAM (2), serving as a redundancy circuit, and a control unit (4) for replacing a normal memory cell array of the normal RM (2) by a redundancy memory call array of the redundancy RAM (3). The control unit (4) can replace the normal memory cell array by some of a plurality of redundancy memory cells constituting the redundancy memory cell array. Therefore, a defective normal memory cell array can be replaced with using a redundancy memory cell which does not have a defect. As a result, a manufacturing yield of the semiconductor memory device (1) can be improved. With this constitution provided is a technique to improve the manufacturing yield of a semiconductor memory device which comprises a redundancy circuit.
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Nguyen Van Thu
Renesas Technology Corp.
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