Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2005-03-01
2005-03-01
Kim, Matthew (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S141000
Reexamination Certificate
active
06862665
ABSTRACT:
A schematic, system, and flowchart to facilitate storage of directory information for a cache coherency protocol. The protocol allows for at least a single bit of directory information overwriting data stored in a cache coherency unit based at least in part on at least one status bit stored in a storage unit. Likewise, the cache coherency protocol determines whether the cache shared.
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Kim Matthew
Nesheiwat Michael J.
Patel Hetul
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