Semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S349000

Reexamination Certificate

active

06914300

ABSTRACT:
In a potential interconnection layer, when viewed from a plane, a plurality of power supply potential regions and ground potential regions are alternately provided, with an interlayer insulation layer lying therebetween. A contact plug penetrating a second insulation layer is provided to electrically connect a source/drain (S/D) region on one side of a selected field effect transistor with a selected power supply potential region. Similarly, a contact plug penetrating the second insulation layer is provided to electrically connect a source/drain (S/D) region on the other side of another selected field effect transistor with a selected ground potential region. By employing this structure, a semiconductor device having a plurality of semiconductor circuits in which a power supply potential and a ground potential can be stabilized regardless of the cross-sectional structure of the semiconductor device is provided.

REFERENCES:
patent: 6600173 (2003-07-01), Tiwari
patent: 2003/0094654 (2003-05-01), Christensen et al.
patent: 2004/0129977 (2004-07-01), Ohkubo et al.
patent: 7-297188 (1995-11-01), None
patent: 8-298285 (1996-11-01), None
patent: 8-330546 (1996-12-01), None
patent: 2001-127300 (2001-05-01), None

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