Non-volatile programmable and electrically erasable memory...

Details Non-volatile programmable and electrically erasable memory... Non-volatile programmable and electrically erasable memory...

2005-09-06

2005-09-06

Lebentritt, Michael (Department: 2812)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C438S257000

Reexamination Certificate

active

06940119

ABSTRACT:
The semiconducting memory device comprises a non-volatile programmable and electrically erasable memory cell with a single layer of grid material and comprising a floating grid transistor and a control grid, within an active semiconducting area formed in a region of the substrate and delimited by an isolation region. The layer of grid material EG, FL P2in which the floating grid FG is made extends integrall above the active area ZA without overlapping part of the isolation region STI, and the transistor is electrically isolated from the control grid CG by PN junctions that will be reverse biased.

REFERENCES:
patent: 5309009 (1994-05-01), Chao
patent: 5761121 (1998-06-01), Chang
patent: 6326663 (2001-12-01), Li et al.
patent: 6538275 (2003-03-01), Sugiyama et al.
patent: WO94/00881 (1994-01-01), None

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