MOS transistors and methods for manufacturing the same

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation

Reexamination Certificate

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C438S682000

Reexamination Certificate

active

06838366

ABSTRACT:
MOS transistors and a methods for manufacturing the same are described. In one such MOS transistor, source and drain regions12are formed in an element region on an Si substrate11, and a gate electrode14including silicide is formed through a gate oxide film13over a channel region between the source and drain regions12. The gate electrode14is formed such that it includes a polysilicon gate electrode14and silicide142on an upper portion thereof. At least a thickness of and metal to be contained in the silicide142on the gate electrode14are selected regardless of silicide121provided over the source and drain regions12. The thickness of the silicide142provided over the gate electrode14may be greater than the thickness of the silicide121provided over the source and drain regions12.

REFERENCES:
patent: 5576244 (1996-11-01), Hayashi et al.
patent: 5731239 (1998-03-01), Wong et al.
patent: 6200871 (2001-03-01), Moslehi
patent: 6207543 (2001-03-01), Harvey et al.
patent: 6376320 (2002-04-01), Yu
patent: 6387803 (2002-05-01), Talwar et al.
patent: 6524939 (2003-02-01), Tseng
patent: 6610564 (2003-08-01), Fukada et al.
patent: 11-074219 (1999-03-01), None
patent: 11-121745 (1999-04-01), None
patent: 2000-091560 (2000-03-01), None

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