Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1996-03-20
1998-01-27
Niebling, John
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438540, 257529, 148DIG55, H01L 2170
Patent
active
057122067
ABSTRACT:
The structure and method is provided which prevents moisture and contamination from diffusing through openings (e.g., fuse windows) in insulating layers to product devices. Three moisture barrier layers form a moisture impervious boundary system to prevent moisture from diffusing from a fuse window into other overlying layers and into product devices. First and second barrier layers are formed insulation layers below the fuse. A third barrier layer is formed over an uppermost insulation layer, the sidewalls of a fuse window and over the fuse. The first and third barrier layers form a seal in the fuse area. The method comprises forming an insulating layer 52 54 over portions of said substrate 50 including in said fuse window area 63. A first barrier layer 56, a first interlevel dielectric layer 58 are formed over the insulating layer. A second barrier layer 60 is formed over said first interlevel dielectric layer 58. Then a fuse 62 and overlying insulating and conductive layers 66 70 are formed over said fuse 62. Next, a fuse window 73 is formed through said insulating and conductive layers exposing the fuse and the first barrier layer. A third barrier layer 72 is formed over the fuse window, the fuse and the first barrier layer in the fuse window area.
REFERENCES:
patent: 4536949 (1985-08-01), Takayama et al.
patent: 5017510 (1991-05-01), Welch
patent: 5578517 (1996-11-01), Yoo et al.
patent: 5585662 (1996-12-01), Ogawa
patent: 5585663 (1996-12-01), Bezama et al.
Ackerman Stephen B.
Chang Joni Y.
Niebling John
Saile George O.
Stoffel William J.
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