Pattern forming method and semiconductor device manufactured...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000, C716S030000

Reexamination Certificate

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06901577

ABSTRACT:
A pattern forming method includes determining an allowable value of an etching conversion difference, obtaining a maximum distance between patterns generating the etching conversion difference within the allowable value, the patterns including main patterns or both main patterns and a dummy pattern, preparing a first design layout in which a first distance between the main patterns is smaller than the maximum distance, or a second design layout in which a second distance between the main patterns and the dummy pattern is smaller than the maximum distance, performing a design data conversion based on the first or second design layout to form first or second design data, and forming the main patterns by using the first design data, or forming both the main patterns and the dummy pattern by using the second design data.

REFERENCES:
patent: 5278105 (1994-01-01), Eden et al.
patent: 5379233 (1995-01-01), Tripathi et al.
patent: 5903011 (1999-05-01), Hatanaka
patent: 2002/0184606 (2002-12-01), Ohba et al.
patent: 3-180041 (1991-08-01), None
patent: 4-130709 (1992-05-01), None
patent: 9-319067 (1997-12-01), None
patent: 2000269190 (2000-09-01), None
Sato et al., “Manufacture of Photomask”, Patent Abstracts of Japan, Publication No. 02-236549, Sep. 19, 1990.

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