Circuit device with at least partial packaging, exposed...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices

Reexamination Certificate

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Details

C257S686000, C257S685000, C257S777000, C257S684000, C257S796000, C257S712000, C257S713000, C257S691000, C257S698000

Reexamination Certificate

active

06921975

ABSTRACT:
A circuit device (15) is placed within an opening of a conductive layer (10) which is then partially encapsulated with an encapsulant (24) so that the active surface of the circuit device (15) is coplanar with the conductive layer (10). At least a portion of the conductive layer (10) may be used as a reference voltage plane (e.g. a ground plane). Additionally, a circuit device (115) may be placed on a conductive layer (100) such that an active surface of circuit device (115) is between conductive layer (100) and an opposite surface of circuit device (115). The conductive layer (100) has at least one opening (128) to expose the active surface of circuit device (115). The encapsulant (24, 126,326) may be electrically conductive or electrically non-conductive.

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patent: 2002/0064931 (2002-05-01), Ong
patent: 0777274 (1997-06-01), None
patent: WO 02/21595 (2002-03-01), None
patent: WO 02/33751 (2002-04-01), None

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