Method of manufacturing semiconductor resin molding and...

Details Method of manufacturing semiconductor resin molding and... Method of manufacturing semiconductor resin molding and...

2005-07-19

2005-07-19

Weiss, Howard (Department: 2814)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

C438S110000

Reexamination Certificate

active

06919223

ABSTRACT:
A space portion is present between the upper surface of a semiconductor chip of a semiconductor chip mounted substrate fitted into a cavity (concave portion for setting) of a lower mold section and the top surface of a cavity of an upper mold section. The upper and lower mold sections are closed while a resin member having a thickness larger than the height of the space portion is inserted in the space portion. At this time, clamping force between the upper and lower mold sections is applied to the semiconductor chip through the resin member. The resin member is deformed in response to the shape of the space portion. Underfill is molded between the semiconductor chip and the substrate while the resin member adheres to both of the upper surface of the semiconductor chip and the top surface of the cavity of the upper mold section. Consequently, the underfill resin is prevented from flowing into a clearance between the upper surface of the semiconductor chip and the top surface of the cavity of the upper mold section. Thus, the upper surface of the semiconductor chip is prevented from formation of a resin molding flash.

REFERENCES:
patent: 5079190 (1992-01-01), Mihara
patent: 6313521 (2001-11-01), Baba
patent: 6429043 (2002-08-01), Nakazawa et al.
patent: 6627997 (2003-09-01), Eguchi et al.
patent: 6767767 (2004-07-01), Hayashida et al.
patent: 6774466 (2004-08-01), Kajiwara et al.

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