Delay circuit, testing apparatus, and capacitor

Details Delay circuit, testing apparatus, and capacitor Delay circuit, testing apparatus, and capacitor

2005-09-13

2005-09-13

Siek, Vuthe (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C327S276000

Reexamination Certificate

active

06944835

ABSTRACT:
A delay circuit having an adjustable delay resolution is provided. The delay circuit has a path through which a signal transmits, a field effect transistor whose source region and drain region are connected to the path, and an impressed voltage control unit which controls a voltage to be impressed to the gate electrode of the field effect transistor. The impressed voltage control unit may be a digital analog converter.

REFERENCES:
patent: 4331914 (1982-05-01), Huber
patent: 4829272 (1989-05-01), Kameya
patent: 5416436 (1995-05-01), Rainard

Affiliated with

Also associated with

Rating

Delay circuit, testing apparatus, and capacitor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Delay circuit, testing apparatus, and capacitor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Delay circuit, testing apparatus, and capacitor will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3412156