FinFET SRAM cell with chevron FinFET logic

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S903000, C257S628000, C257S393000, C438S198000, C438S150000

Reexamination Certificate

active

06867460

ABSTRACT:
An electronic device, and SRAM and a method of forming the electronic device and SRAM. The semiconductor device including: a pass gate transistor having a fin body having opposing sidewalls aligned in a first direction and having a first majority carrier mobility and a gate adjacent to both sidewalls of the fin body; a pull down latch transistor having a fin body having opposing sidewalls aligned in a second direction and having a second majority carrier mobility and a gate adjacent to both sidewalls of thc fin body; a pull up latch transistor having a fin body having opposing sidewalls aligned in a third direction and having a third majority carrier mobility and a gate adjacent to both sidewalls of the fin body; and CMOS chevron logic circuits, wherein crystal planes of each fin body and of CMOS transistor of the chevron logic are co-aligned.

REFERENCES:
patent: 5970330 (1999-10-01), Buynoski
patent: 6117722 (2000-09-01), Wuu et al.
patent: 6150693 (2000-11-01), Wollesen
patent: 6413802 (2002-07-01), Hu et al.
patent: 6475869 (2002-11-01), Yu
patent: 6525403 (2003-02-01), Inaba et al.
patent: 6657259 (2003-12-01), Fried et al.
patent: 6765303 (2004-07-01), Krivokapic et al.

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