Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-07-05
2005-07-05
Garbowski, Leigh M. (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000, C703S016000
Reexamination Certificate
active
06915504
ABSTRACT:
An arithmetic device allocation design method of the present invention includes the steps of: in the case of allocating an arithmetic operation A to the arithmetic device, comparing an increased circuit area due to a selector to be provided so as to allocate the operation A to an arithmetic device C to which another arithmetic operation B has already been allocated and an increased area due to an arithmetic device D to be created anew to which only the operation A is allocated; when the increased circuit area due to the selector is smaller, allocating the operation A to the device C to which the another operation B has already been allocated while providing the selector; and when the increased circuit area due to the device D is smaller, creating the device D anew so as to allocate the operation A to the device D created anew.
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Birch & Stewart Kolasch & Birch, LLP
Garbowski Leigh M.
Kik Phallaka
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