Supporting error correction and improving error detection...

Details Supporting error correction and improving error detection... Supporting error correction and improving error detection...

2005-07-05

2005-07-05

Bonzo, Bryce P. (Department: 2113)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S043000, C714S044000, C714S048000, C714S052000, C714S701000, C714S758000, C710S307000

Reexamination Certificate

active

06915446

ABSTRACT:
An error correction code mechanism for the extensions to the peripheral component interconnect bus system (PCI-X) used in computer systems is fully backward compatible with the full PCI protocol. The error correction code check-bits can be inserted to provide error correction capability for the header address and attribute phases, as well as for burst and DWORD transaction data phases. The error correction code check-bits are inserted into unused attribute, clock phase, reserved, or reserved drive high portions of the AD and/or C/BE# lanes of the PCI-X phases.

REFERENCES:
patent: 5978953 (1999-11-01), Olarig
patent: 6085272 (2000-07-01), Kuo
patent: 2003/0065842 (2003-04-01), Riley et al.
patent: 2003/0097509 (2003-05-01), Fry et al.
patent: 2004/0054955 (2004-03-01), Riley
PCI Special Interest Group, “PCI-X Addendum to the PCI Local Bus Specification”, Sep. 22, 1999, Revision 1.0, pp. 2, and 11.

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