Manufacturing seedless barrier layers in integrated circuits

Details Manufacturing seedless barrier layers in integrated circuits Manufacturing seedless barrier layers in integrated circuits

2005-05-17

2005-05-17

Zarabian, Amir (Department: 2822)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S637000, C438S648000

Reexamination Certificate

active

06893955

ABSTRACT:
An integrated circuit manufacturing method is provided having a semiconductor substrate with a semiconductor device. A device dielectric layer is formed on the semiconductor substrate and a channel dielectric layer on the device dielectric layer has an opening formed therein. A barrier layer lines the channel opening and a conductor core fills the opening over the barrier layer. A seedless barrier layer lines the opening, and a conductor core fills the opening over the seedless barrier layer. The barrier layer is deposited in the opening and contains atomic layers of barrier material which bonds to the dielectric layer, an intermediate material which bonds to the barrier material layer and to the conductor core, and a conductor core material which bonds to the intermediate material. The conductor core bonds to the conductor core material.

REFERENCES:
patent: 6268291 (2001-07-01), Andricacos et al.
patent: 6482733 (2002-11-01), Raaijmakers et al.
patent: 20030198587 (2003-10-01), Kaloyeros et al.

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