Method and apparatus for replacing a defective cell within a...

Details Method and apparatus for replacing a defective cell within a... Method and apparatus for replacing a defective cell within a...

2005-09-27

2005-09-27

Lam, David (Department: 2827)

Static information storage and retrieval

Read/write circuit

Bad bit

C365S201000, C365S230060

Reexamination Certificate

active

06950352

ABSTRACT:
A method and apparatus is provided for replacing defective storage cells within a memory device having twisted bit lines. If a defective storage cell is discovered, the row containing that storage cell can be re-mapped to the neighboring row or the memory array. Each successive neighboring row is also re-mapped to succeeding neighboring rows by incrementing or decrementing the row addresses. This will cause the addresses to essentially shift one address value toward the redundant set of rows, and one redundant row will be subsumed for every defective row within the array. Whenever an address is shifted across a twist region, the data of that address is purposely inverted in binary voltage value (i.e., converted from a binary 1 to a binary 0, and vice versa) to accommodate the twisting of the true and complementary bit line locations.

REFERENCES:
patent: 6018480 (2000-01-01), Wik et al.
patent: 6282113 (2001-08-01), DeBrosse
patent: 6292383 (2001-09-01), Worley
patent: 6560150 (2003-05-01), Abedifard

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