Circuit configuration for signal balancing in antiphase bus...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Output switching noise reduction

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C326S030000, C326S031000, C326S086000

Reexamination Certificate

active

06922073

ABSTRACT:
A circuit configuration for signal balancing in antiphase bus drivers, particularly for a CAN bus, which have, in each driver path of the bus, a driver amplifier unit and an output stage, driven by the latter, having a power transistor circuit for transmitting an antiphase signal using a two-wire line. A control circuit is connected to one of the driver paths and controls the turn-on resistance of the power transistor circuit in this driver path such that the power transistor circuits in the two driver paths have the same turn-on resistance.

REFERENCES:
patent: 5448180 (1995-09-01), Kienzler et al.
patent: 6154061 (2000-11-01), Boezen et al.
patent: 99/57810 (1999-11-01), None

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Circuit configuration for signal balancing in antiphase bus... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Circuit configuration for signal balancing in antiphase bus..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuit configuration for signal balancing in antiphase bus... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3404827

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.