Backplane architecture for a telecommunications system chassis

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture

Reexamination Certificate

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Details

C710S301000, C361S689000, C455S347000, C370S910000, C379S900000

Reexamination Certificate

active

06862644

ABSTRACT:
A backplane (11) of a telecommunications chassis includes a pair of controller slots that can receive respective controller modules. The backplane (11) also has a plurality of module slots that can receive respective telephony modules. Each of the pair of controller slots is connected by a plurality of buses to each of the plurality of module slots. The backplane (11) provides the ability to place any module type into any of the plurality of module slots.

REFERENCES:
patent: 4945201 (1990-07-01), Ito et al.
patent: 5331632 (1994-07-01), Aaron et al.
patent: 5987620 (1999-11-01), Tran
patent: 6188912 (2001-02-01), Struhsaker et al.
patent: 6731741 (2004-05-01), Fourcand et al.
patent: 6748477 (2004-06-01), Benson et al.
“IEEE standard backplane bus specification for multiprocessor architectures: Futurebus” by Technical Committee on Microprocessors and Microcomputers of the IEEE Computer Society, USA (abstract only).*
“Experimental research on a hot swappable bus system” by Yamada, T.; Kaminaga, Y.; Kurosawa, K.; Ohashi, A.; Masui, K. (abstract only).

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