Semiconductor memory device having the operating voltage of...

Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator

Reexamination Certificate

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Details

C365S189110, C365S154000, C365S226000

Reexamination Certificate

active

06862227

ABSTRACT:
An SRAM circuit which can be operated at a reduced operation margin, especially at a low operating voltage by increasing or optimizing the operation margin of the SRAM circuit. The threshold voltage of the produced transistor in the SRAM circuit is detected to compare the operating voltage of a memory cell with the operating voltage of a peripheral circuit in order to adjust it to the optimum value, and the substrate bias voltage is further controlled.

REFERENCES:
patent: 6075404 (2000-06-01), Shindoh et al.
patent: 6125075 (2000-09-01), Watanabe et al.
patent: 6256252 (2001-07-01), Arimoto
patent: 6265932 (2001-07-01), Miyawaki
patent: 6288967 (2001-09-01), Fujisawa et al.
patent: 6683805 (2004-01-01), Joshi et al.
patent: 6-139779 (1994-05-01), None
patent: 2000-268574 (2000-09-01), None

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