Lateral short-channel DMOS, method of manufacturing the...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C438S286000

Reexamination Certificate

active

06946705

ABSTRACT:
A lateral short-channel DMOS includes an N−-type epitaxial layer110in a P−-type semiconductor substrate108, a P-type well114in the N−-type epitaxial layer110with a channel forming region C, an N+-type source region116in the P-type well114, an N+-type drain region118in N−-type epitaxial layer110, and a gate electrode122formed via a gate insulating film120in at least an upper part of the channel forming region C out of a region from the N+-type source region116to the N+-type drain region118. The lateral short-channel DMOS also includes an N+-type well140that is formed in the N−-type epitaxial layer110and includes a concentration of N-type dopant higher than the N−-type epitaxial layer110and lower than the N+-type drain region118, with the N+-type drain region118being formed in this N+-type well140.

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patent: 5369045 (1994-11-01), Ng et al.
patent: 6424005 (2002-07-01), Tsai et al.
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patent: 7-283409 (1995-10-01), None
patent: 11-340454 (1999-12-01), None

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