Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2005-07-26
2005-07-26
Lane, Jack A. (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S163000, C711S167000, C711S168000
Reexamination Certificate
active
06922760
ABSTRACT:
A system for handling distributed results in a high-performance wide-issue superscalar processor having result-forwarding capability is disclosed. The system generally includes buffer logic configured to produce write data and write information to a register file. The register file generally has a plurality of registers and is adapted to receive the write information, the write data, and read information. The register file also includes logic configured to produce the write data as read data output when the read information and the write information specify the same register. An embodiment of the disclosed register file includes multiple registers for storing data, read logic, correction logic, and muxing logic.
REFERENCES:
patent: 5349677 (1994-09-01), Cray et al.
patent: 6138230 (2000-10-01), Hervin et al.
patent: 6732336 (2004-05-01), Nystrom et al.
Conley & Rose, P.C.
Lane Jack A.
LSI Logic Corporation
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