Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-05-03
2005-05-03
Whitmore, Stacy A. (Department: 2812)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
Reexamination Certificate
active
06889372
ABSTRACT:
Some embodiments of the invention provide a method of identifying routes for net in a region of a design layout. The method identifies a first route for a first net without using a routing grid. It then updates at least one previously defined route for another net to account for spacing constraints relating to the first route. In some embodiments, the method further (1) identifies previously defined routes that might need to be modified to account for spacing constraints relating to the first route; (2) examines the identified routes to determine whether the identified routes need to be modified to account for spacing constraints relating to the first route; and (3) updates several previously defined routes to account for spacing constraints relating to the first route.
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Caldwell Andrew
Teig Steven
Cadence Design Systems Inc.
Strattler, Johansen & Adeli, LLP
Whitmore Stacy A.
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