Method for designing integrated circuit device

Details Method for designing integrated circuit device Method for designing integrated circuit device

2005-04-26

2005-04-26

Do, Thuan (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

06886150

ABSTRACT:
Information about an exclusive operation among a plurality of blocks and interconnection information about a sharable resource within each of these blocks are defined. Based on the sharable resource information and the inter-block exclusive operation information, a resource sharable among the blocks is extracted. Module specifications, in which information about interfaces, power dissipation, operation models and top-level hierarchy interconnection is stored, exclusive operation information describing an exclusive operation rule among the blocks, and prioritized function information used for preventing respective functions from being enabled at the same time are input to an generator, which is an automatic generating tool. In this manner, a power and clock management module for use in power save management, a wrapper bank select module storing interconnection information, a shared resource module storing information about a sharable resource and an optimized top-level hierarchy module storing interconnection information about an optimized top-level hierarchy are generated. Downsizing and power saving are realized by resource sharing and power management.

REFERENCES:
patent: 4896272 (1990-01-01), Kurosawa
patent: 5557531 (1996-09-01), Rostoker et al.
patent: 5613136 (1997-03-01), Casavant
patent: 5831864 (1998-11-01), Raghunathan et al.
patent: 5867400 (1999-02-01), El-Ghoroury et al.
patent: 5919264 (1999-07-01), Reneris
patent: 6092208 (2000-07-01), Reneris
patent: 6332197 (2001-12-01), Jadav et al.
patent: 05325539 (1993-12-01), None
patent: 08221371 (1996-08-01), None
patent: 10336211 (1998-12-01), None

Affiliated with

Also associated with

Rating

Method for designing integrated circuit device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for designing integrated circuit device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for designing integrated circuit device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3397011