Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate
2005-04-19
2005-04-19
Lam, David (Department: 2818)
Static information storage and retrieval
Addressing
Plural blocks or banks
C365S230060, C365S205000
Reexamination Certificate
active
06882592
ABSTRACT:
A semiconductor memory device includes: a memory cell array having a plurality of data select lines disposed in parallel with each other, a plurality of data transfer line disposed in parallel with each other to intersect the data select lines, and electrically rewritable memory cells laid out at cross portions between the data select lines and data transfer lines; a data select line driver for driving the data select lines of the memory cell array; a sense amplifier circuit connected to the data transfer lines of the memory cell array, for performing data read of memory cells selected by one of the data select lines; and a control circuit used for timing control of data read of the memory cell array, for outputting at least two types of timing signals as being different in accordance with a selected data area of the memory cell array.
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Goda Akira
Nitta Hiroyuki
Noguchi Mitsuhiro
Kabushiki Kaisha Toshiba
Lam David
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
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