Method for evaluating logic functions by logic circuits...

Details Method for evaluating logic functions by logic circuits... Method for evaluating logic functions by logic circuits...

2005-05-31

2005-05-31

Siek, Vuthe (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

06901573

ABSTRACT:
A method for creating a logic circuit with an optimized number of AND/OR switches, which evaluates a logic function defined in a high-level description. Through analyzing the dependency relationship among operators used to define the logic function, the present invention may simplify the functional steps used in the high-level description to define the logic function and thus create a logic circuit with an optimized number of AND/OR switches.

REFERENCES:
patent: 5557797 (1996-09-01), Yano
patent: 6433588 (2002-08-01), Yamashita et al.
patent: 6728939 (2004-04-01), Johannsen

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