Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2005-09-13
2005-09-13
Tran, Minhloan (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S321000, C257S389000, C257S411000
Reexamination Certificate
active
06943404
ABSTRACT:
A multi-level memory cell includes a substrate, an insulation layer, a silicon stripe, a first control gate, a second control gate, source/drain regions, silicon oxide/silicon nitride/silicon oxide composite layers. The insulation layer and the silicon stripe are sequentially disposed on the substrate. The first control gate and the second control gate are respectively disposed on the sidewalls of the silicon stripe, while the source/drain regions are configured in the silicon stripe beside both sides of the first control gate and the second control gate. The composite dielectric layers are disposed between the first control gate and the silicon stripe, and between the second control gate and the silicon stripe. Since a single memory structure can store a multiple bit of information, it is advantageous for minimizing devices.
REFERENCES:
patent: 2003/0042531 (2003-03-01), Lee et al.
Chang Ko-Hsing
Huang Chiu-Tsung
Jiang Chyun IP Office
Powerchip Semiconductor Corp.
Tran Minhloan
Tran Tan
LandOfFree
Sonos multi-level memory cell does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Sonos multi-level memory cell, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Sonos multi-level memory cell will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3390937