Refresh control circuit and method for semiconductor memory...

Static information storage and retrieval – Read/write circuit – Data refresh

Reexamination Certificate

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C365S197000

Reexamination Certificate

active

06894942

ABSTRACT:
A refresh control circuit and a method for refreshing control of a semiconductor memory device are described. The refresh control circuit includes a sense amplifier control circuit configured to generate a sense amplifier driving signal by selectively applying a first delay time and a second delay time (first delay time+third delay time) in response to a sense amplifier enable signal and a refresh command signal (or refresh fail detect signal), and a sense amplifier driver configured to output a sense amplifier driving voltage by applying the first delay time or the second delay time according to a mode.

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