Refresh control circuit and methods of operation and control...

Static information storage and retrieval – Read/write circuit – Data refresh

Reexamination Certificate

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C365S194000, C365S195000

Reexamination Certificate

active

06847572

ABSTRACT:
A refresh operation in a PSRAM device to hidden-refresh an internal memory cell by using a refresh pulse signal may be controlled by forming a dummy duration for the refresh operation in a read/write cycle, reducing the dummy duration when the refresh pulse signal is not generated, and delaying the read/write cycle until the refresh operation is completed, when the refresh pulse signal is generated. The dummy duration may be reduced by a given amount during a period in which the refresh operation is not being performed, while the dummy duration may be increased in period of time subject to the refresh operation.

REFERENCES:
patent: 5617551 (1997-04-01), Corder
patent: 6275437 (2001-08-01), Kim et al.

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