Method for reducing a magnitude of a rate of current change...

Details Method for reducing a magnitude of a rate of current change... Method for reducing a magnitude of a rate of current change...

2005-03-22

2005-03-22

Perveen, Rehana (Department: 2116)

Electrical computers and digital processing systems: support

Computer power control

Power conservation

C713S300000, C713S340000, C320S159000, C323S312000, C327S380000, C327S403000, C361S718000, C365S226000

Reexamination Certificate

active

06871290

ABSTRACT:
A method for reducing a magnitude of a rate of current change of an integrated circuit is provided. The method uses a plurality of transistors controlled by a finite state machine, such as a counter, to gradually reduce current sourced from a power supply. Further, the finite state machine is controlled by a micro-architectural stage that determines when the integrated circuit needs to be powered down.

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patent: WO 9314568 (1993-07-01), None
PCT Search Report dated Jan. 2, 2003, 6 pages.

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