Non-volatile semiconductor memory device in which selection...

Details Non-volatile semiconductor memory device in which selection... Non-volatile semiconductor memory device in which selection...

2005-09-27

2005-09-27

Weiss, Howard (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S390000, C257S392000

Reexamination Certificate

active

06949794

ABSTRACT:
A non-volatile semiconductor memory device is disclosed, which comprises a memory cell unit including at least one memory cell transistor formed on a semiconductor substrate and having a laminated structure of a charge accumulation layer and a control gate layer, and a selection gate transistor one of the source/drain diffusion layer regions of which is connected to a bit line or a source line and the other of the the source/drain diffusion layer regions of which is connected to the memory cell unit. The shape of the source diffusion layer region of the selection gate transistor is asymmetical to the shape of the drain diffusion layer region thereof below the selection gate transistor.

REFERENCES:
patent: 5293337 (1994-03-01), Aritome et al.
patent: 5949101 (1999-09-01), Aritome
patent: 6072721 (2000-06-01), Arase
patent: 10-209405 (1998-08-01), None
patent: 10-214494 (1998-08-01), None
patent: 11-67938 (1999-03-01), None
patent: 11-224909 (1999-08-01), None
patent: 2000-68487 (2000-03-01), None

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