Electronic digital logic circuitry – Multifunctional or programmable – Array
Reexamination Certificate
2005-07-12
2005-07-12
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Multifunctional or programmable
Array
C326S037000
Reexamination Certificate
active
06917219
ABSTRACT:
The circuitry of a programmable logic device (for example, an FPGA) includes a configurable logic portion and a configuration memory. The configuration memory stores configuration data that configures the configurable logic portion to realize a user-defined circuit. The configurable logic portion is disposed on a first die whereas the configuration memory is disposed on a second die. The second die is bonded to the first die in stacked relation. Each bit of configuration data passes from the second die to the first die through a pair of micropads. One micropad of the pair is disposed on the first die and the other micropad of the pair is disposed on the second die. When the first die and second die are brought together in face-to-face relation, the two micropads form an electrical connection through which the configuration data bit passes from the second die to the first die.
REFERENCES:
patent: 5162260 (1992-11-01), Leibovitz et al.
patent: 5270261 (1993-12-01), Bertin et al.
patent: 5323060 (1994-06-01), Fogal et al.
patent: 5327327 (1994-07-01), Frew et al.
patent: 5380681 (1995-01-01), Hsu
patent: 5481133 (1996-01-01), Hsu
patent: 5502333 (1996-03-01), Bertin et al.
patent: 5521122 (1996-05-01), Kuramochi
patent: 5552633 (1996-09-01), Sharma
patent: 5561622 (1996-10-01), Bertin et al.
patent: 5568574 (1996-10-01), Tanguay, Jr. et al.
patent: 5629563 (1997-05-01), Takiar et al.
patent: 5633530 (1997-05-01), Hsu
patent: 5640107 (1997-06-01), Kruse
patent: 5652811 (1997-07-01), Cook et al.
patent: 5705938 (1998-01-01), Kean
patent: 5781031 (1998-07-01), Bertin et al.
patent: 5804004 (1998-09-01), Tuckerman et al.
patent: 5905639 (1999-05-01), Warren
patent: 5990501 (1999-11-01), Hiyoshi et al.
patent: 6091263 (2000-07-01), New et al.
patent: 6107821 (2000-08-01), Kelem et al.
patent: 6114221 (2000-09-01), Tonti et al.
patent: 6255736 (2001-07-01), Kaneko
patent: 6255848 (2001-07-01), Schultz et al.
patent: 6271059 (2001-08-01), Bertin et al.
patent: 6337579 (2002-01-01), Mochida
patent: 6368930 (2002-04-01), Enquist
patent: 6404226 (2002-06-01), Schadt
patent: 6410431 (2002-06-01), Bertin et al.
patent: 6444560 (2002-09-01), Pogge et al.
patent: 6526559 (2003-02-01), Schiefele et al.
patent: 6781226 (2004-08-01), Huppenthal et al.
patent: 2002/0008309 (2002-01-01), Akiyama
patent: 2002/0064906 (2002-05-01), Enquist
patent: 0 740 343 (1996-10-01), None
Alex Romanelli, “Intel Stacks Flash Deck in its Favor,” Electronic News, Apr. 10, 2003, available from Reed Electronics Group@ http://www.e-insite.net/electronicnews/index.asp?layout=article&articleid=CA291318.
Xilinx, Inc., “The Programmable Logic Data Book,” Mar. 1999, available from Xilinx, Inc., 2100 Logic Drive, San Jose, California 95124, pp. 3-1 through 3-60.
Liu Justin
Maunu LeRoy D.
Nguyen Linh V.
Tokar Michael
Wallace T. Lester
LandOfFree
Multi-chip programmable logic device having configurable... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Multi-chip programmable logic device having configurable..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multi-chip programmable logic device having configurable... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3386193