Low power buffer implementation

Details Low power buffer implementation Low power buffer implementation

2005-09-06

2005-09-06

Siek, Vuthe (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000

Reexamination Certificate

active

06941526

ABSTRACT:
A lower current input buffer is used for waking up a plurality of higher-current buffers. The lower current buffer monitors a wake-up signal and, when present, enables the higher current buffers. A higher current buffer is used to detect the sleep mode and disable the higher current buffers. A delay circuit may be used to balance the propagation delay through the circuit.

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patent: 2003/0117875 (2003-06-01), Lee et al.
Two Novel Fully Complementary Self-Biased CMOS Differential Amplifiers, Mel Bazes, IEEE Journal of Solid-State Circuits, vol. 26, No. 2, Feb. 1991, pp. 165-168.

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